The invention relates to a circuit arrangement for supplying a drive voltage to an enhancement mode field effect transistor arranged as a current source whose channel is included between a first supply voltage terminal and an output terminal, said circuit arrangement comprising:
a first depletion mode field effect transistor operated in the non-saturated mode whose channel is included between the first supply voltage terminal and a junction point,
a second depletion mode field effect transistor operated in the saturated mode whose channel is included between the said junction point and a second supply voltage terminal, the drive voltage for the current source field effect transistor being supplied from the said junction point to the gate of the current source field effect transistor.
A circuit arrangement of this type is known from U.S. Pat. No. 4,004,164. In this known circuit arrangement the gate of the first field effect transistor is connected to a reference voltage, for example a voltage at ground level, and the gate of the second field effect transistor is connected to the said junction point. With an appropriate choice of the parameters the field effect transistor arranged as a current source will supply a current which varies inversely with changes in the supply voltage in order to supply a compensated current to an analogous circuit.
It is not an object of the present application to supply a compensated current, but rather to provide a circuit arrangement for supplying a drive voltage to an enhancement mode field effect transistor arranged as a current source, which field effect transistor, with this drive voltage, supplies a current which is independent of temperature variations to a great extent.